board: pcb change edge constraint to fit jlcpcb

This commit is contained in:
phiwan-dev 2026-03-08 12:58:38 +01:00
parent 2a7540e5ee
commit c20e1365c7

View file

@ -125,7 +125,7 @@
"max_error": 0.005, "max_error": 0.005,
"min_clearance": 0.1, "min_clearance": 0.1,
"min_connection": 0.0, "min_connection": 0.0,
"min_copper_edge_clearance": 0.5, "min_copper_edge_clearance": 0.2,
"min_groove_width": 0.0, "min_groove_width": 0.0,
"min_hole_clearance": 0.1, "min_hole_clearance": 0.1,
"min_hole_to_hole": 0.25, "min_hole_to_hole": 0.25,