phiwan/phiboard
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

board: start rough footprint placement

Browse source
This commit is contained in:
phiwan-dev 2026-02-11 10:12:27 +01:00
parent bd47cb1b81
commit d4337f990b
2 changed files with 2267 additions and 785 deletions
Download patch file Download diff file Expand all files Collapse all files

69
board/board.kicad_pro
View file

@ -37,9 +37,9 @@
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 0.8,
"height": 1.27,
"width": 2.54
"drill": 0.0,
"height": 0.4,
"width": 0.6
},
"silk_line_width": 0.1,
"silk_text_italic": false,
@ -51,7 +51,13 @@
"min_clearance": 0.5
}
},
"diff_pair_dimensions": [],
"diff_pair_dimensions": [
{
"gap": 0.0,
"via_gap": 0.0,
"width": 0.0
}
],
"drc_exclusions": [],
"meta": {
"version": 2
@ -117,11 +123,11 @@
},
"rules": {
"max_error": 0.005,
"min_clearance": 0.0,
"min_clearance": 0.1,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.5,
"min_groove_width": 0.0,
"min_hole_clearance": 0.25,
"min_hole_clearance": 0.1,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.2,
"min_microvia_drill": 0.1,
@ -129,10 +135,10 @@
"min_silk_clearance": 0.0,
"min_text_height": 0.8,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.0,
"min_via_annular_width": 0.1,
"min_via_diameter": 0.5,
"min_through_hole_diameter": 0.15,
"min_track_width": 0.1,
"min_via_annular_width": 0.05,
"min_via_diameter": 0.25,
"solder_mask_to_copper_clearance": 0.0,
"use_height_for_length_calcs": true
},
@ -180,7 +186,10 @@
"td_width_to_size_filter_ratio": 0.9
}
],
"track_widths": [],
"track_widths": [
0.0,
0.1
],
"tuning_pattern_settings": {
"diff_pair_defaults": {
"corner_radius_percentage": 80,
@ -207,7 +216,24 @@
"spacing": 0.6
}
},
"via_dimensions": [],
"via_dimensions": [
{
"diameter": 0.0,
"drill": 0.0
},
{
"diameter": 0.15,
"drill": 0.3
},
{
"diameter": 0.4,
"drill": 0.3
},
{
"diameter": 0.6,
"drill": 0.3
}
],
"zones_allow_external_fillets": false
},
"ipc2581": {
@ -458,7 +484,7 @@
"classes": [
{
"bus_width": 12,
"clearance": 0.2,
"clearance": 0.1,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
@ -473,6 +499,16 @@
"via_diameter": 0.6,
"via_drill": 0.3,
"wire_width": 6
},
{
"clearance": 0.1,
"name": "min",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 0,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.1,
"via_diameter": 0.6,
"via_drill": 0.3
}
],
"meta": {
@ -480,7 +516,12 @@
},
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": []
"netclass_patterns": [
{
"netclass": "Default",
"pattern": ""
}
]
},
"pcbnew": {
"last_paths": {